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JPEG encoder coprocessor


The JPEG-EC IP Core is a hardware implementation of image coprocessor that performs the JPEG baseline algorithm based on the ISO/IEC 10918-1 standard. It is designed for high quality comression of continues-tone color and gray-scale images. The IP core consists the Digital Cosine Transform (DCT) module, Quantization module and Entropy Huffman Encoder to fully support JPEG baselie process. The JPEG-EC has pipeline architecture and provides a high-prerformance solution for image and video processing application. Example throughput : 217 frames/sec for 640 x 480 images size, with 100 MHz operation clock.

The core is highly configurable and can work with unlimited number of color components. In addition to compression image size depends only on hardware resources.

Key Features
  • JPEG baseline encoder compliant with ISO/IEC 10918-1 standard
  • Pipelined architecture
  • Support any data inage format
  • Unlimites number of color components
  • Support unlimited input image size
  • Support continues mode (one image after another)
  • Simple host interface
  • Up to 4 entropy tables
  • Configurable number of quantization and entropy tables
  • 8 bit/pixel component
  • 8 x8 block - format pixel input
  • Simple clock cycle per pixel encoding
  • Fully synthesizable
  • Synchronous RTL design
  • Positive edge clock
  • Image and video processing
  • Medical image systems
  • Surveillance systems
  • Color scaner and printers
  • Image storing


FDCT - Performs 2 dimension Discrete Cosine Transform. The DCT transforms a set of image samples into a set of transform coefficients.  This module is composed of 3 sub-modules : two 1-D DCT modules and memory control unit. Additionally module is directly connected to double port RAM memory, where temporary calculation results are stored. Computed transform coefficients have 11 bits length. 

ZIG-ZAG scan – The 8 x 8 block of quantized coefficients is scanned in zigzag order.  In result low frequencies coefficients are grouped together in upper left cornet of block.

Quantization – Performs integer division on transform coefficients with quantized coefficient, defined by user. This operation's compressing range of transform coefficients amplitude. Data stream becomes more compressible, but distortion increases in decoded image. After this process, image information is irretrievably lost.

RLE -  Performs two types of operations: the Differential Pulse Code Modulation (DPCM) and the Run Length Encode (RLE). The DPCM operation executes on DC coefficients only (first element in 8 x 8 block). The result of this operation is the difference between current and preview DC element. The RLE operation is used for coding AC coefficients. For every non-zero coefficients RLE encoder returns a pair of symbols, which are AC coefficient and number of zeros occurrence before this AC coefficient.

VLC – Compute number of bits required to represent a value of coefficient amplitude. This number of bits and information from output of RLE module are required to find proper Huffman code. The Huffman encoder is directly connected to ROM memory with Huffman code table.

SYNTAXER – This module stores Huffman codes and coded coefficients in 32 bits packed in chronological order. It controls an access to internal FIFO, where JPEG stream is stored. Additionally this module divides 32 data to 8 bit packed and send as JPEG encoder output.


Speed grade
Area Memory Special features
Cyclone II 6 3652 [LC] 7 M4Ks 16 DSP 167
Cyclone III 6 3631 [LC] 6 M9Ks 16 DSP 161
Stratix 6 3640 [LC] 6 M512s, 5 M4Ks 16 DPS 145
Stratix II 3 1918 [ALUT] 7 M4Ks 16 DSP 194
Stratix III 2 2042 [ALUT] 3 M9Ks 14 DSP 214

Speed grade
Area Memory Special features
Spartan 3
2091 [Slices] 5 RAMB16s
8 MULT18x18
Spartan 3E
5 2013 [Slices] 5 RAMB16 8 MULT18x18
Virtex 2
6 2091 [Slices] 5 RAMB16s 8 MULT18x18
Virtex 4
12 2020 [Slices] 5 RAMB16s 8 DSP48
Virtex 5
3 1951 [Slices] 2 RAMB36k+ 3 RAMB18k
8 DSP48Es